Neuromorphic Computing in Low Power CMOS VLSI Circuits

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Date

2026

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CRC Press

Abstract

Neuromorphic computing, which attempts to emulate biological neural networks, offers a highly promising way to solve some of the problems with the traditional von Neumann architectures we have known for decades. The chapter explores how some of the principles of neuromorphic computing can be applied to low power CMOS VLSI circuits and spaces to serve the need for pragmatic, energy efficient, high-performance computing systems. Beginning with the concepts of what neuromorphic computing represents and its promise for transforming artificial intelligence and machine learning applications, the chapter continues to look at how to address the design and performance aspects of forming neuromorphic architectures with CMOS technology, including minimizing power consumption, scalability, or performance improvements. The chapter assesses transistor-level approaches to construct the building blocks of neuromorphic computing, including artificial neurons and synapses, all while operating within the restrictions of available CMOS processes. The chapter also looks into some interesting areas, including memristors and phase-change materials for their application into CMOS circuits under neuromorphic computing paradigm. It also examines diving into newer circuit levies and design strategies that emphasize learning and signal processing efficiency perspectives as functionally distributed computational systems. We describe several case study examples of effective CMOS implementations of neuromorphic computing systems, and this chapter suggests types of applications suited for neuromorphic computing in areas including sensory processing and pattern recognition for environments identified as autonomous actors. To sum up, the chapter ends with a discussion of avenues for future research and some anticipated effects of neuromorphic CMOS circuits on next-generation computing paradigms, particularly with regard to ways they might inform the future use of low-power, brain-inspired computing solutions for a variety of uses.

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Book Title : Chips and Intelligence Low Power VLSI Design with Artificial Intelligence Editor(s) : Kumar Abhishek, Smrity Dwivedi, Jyotirmoy Pathak, Jyoti Kandpal, Suman Lata Tripathi

Keywords

Neuromorphic systems, MOS integrated circuits, Sensor networks, Low power electronics, Smart sensors

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