Spacer Dielectric Engineering for Enhanced Analog/RF Performance in Dual-Metal Double Gate GaAs/Si1-xGex TFETs

dc.contributor.authorRohit Tripathi, Vedvrat, Syed Hasan Saeed, Vivek Kumar
dc.date.accessioned2026-10-03T06:29:25Z
dc.date.issued2026
dc.descriptionEmerging Technologies in Automation, Computation and Electronics Proceedings of EACE 2025 Conference proceedings © 2026. Editors: Kanad Ray, Man Mohan Shukla, M. Shamim Kaiser, Shailendra Singh
dc.description.abstractThe present study provides an investigation DMDG GaAs/Si1 − xGex tunnel field-effect transistor device (TFET) with dielectric spacer based on its ana- log and RF performance metrics. The device performance is assessed for varying spacer dielectric medium (εr = 1, 3.9, 7.5, 9, 25). For precise device modeling and electrostatic control, all simulations are conducted using the 2D TCAD sim- ulation platform. The study reveals that by using the high-k spacers the device parameters i.e., transconductance, cut-off frequency, and gain bandwidth product, substantially increased whereas the threshold voltage decreased. However, use of low-k spacers suppresses the parasitic capacitances but lowers ON-state current (ION). The incorporated spacer modulation indicates that εr = 9 offers an opti- mized device DC and RF characteristic and obtains a higher ION/IOFF ratio. These findings emphasize the significance of dielectric spacer selection as a significant design element for energy-efficient and high-speed nanoelectronic circuits.
dc.identifier.isbn978-3-032-27342-0
dc.identifier.urihttps://doi.org/10.1007/978-3-032-27343-7_26
dc.identifier.urihttp://136.232.12.194:4000/handle/123456789/2251
dc.language.isoen_US
dc.publisherSpringer, Cham
dc.subjectSpacer dielectric geometry
dc.subjectHetero-dielectric spacer
dc.subjectDual-Metal Double Gate (DMDG)
dc.subjectGaAs/SiGe TFET
dc.subjectAnalog/RF performance
dc.subjectFringing field control
dc.subjectRF Figures of merit (FOM)
dc.subjectEnergy-efficient nanoelectronics
dc.titleSpacer Dielectric Engineering for Enhanced Analog/RF Performance in Dual-Metal Double Gate GaAs/Si1-xGex TFETs
dc.typeBook chapter

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