Semiconductor Memories: technology, testing, and reliability Ashok K. Sharma [Text]

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Material type: Text

TextLanguage: English Publication details: New Delhi PHI 2004Description: xii, 462ISBN:

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Holdings
Item type	Current library	Call number	Copy number	Status	Notes	Date due	Barcode
RESERVE BOOKS	CENTRAL LIBRARY	621.39732 SHA/S (Browse shelf(Opens below))	0	Not For Loan	021775		021775
RESERVE BOOKS	CENTRAL LIBRARY	621.39732 SHA/S (Browse shelf(Opens below))	1	Not For Loan	024534		024534

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Previous	621.39732 RAZ/D Design of Analog CMOS Integrated Circuits	621.39732 ROY/L Low-Power CMOS VLSI Circuit Design	621.39732 SAC/D Defect-Oriented Testing for Nano- Metric CMOS VLSI Circuits	621.39732 SHA/S Semiconductor Memories: technology, testing, and reliability	621.39732 SHA/S Semiconductor Memories: technology, testing, and reliability	621.39732 TSI/O Operation and Modeling of the MOS Transistor	621.39732 UYE/C CMOS Logic Circuit Design	Next

Includes Index.

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