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Design and Implementation of RC6 Block Cipher using VHDL Fahad Hasrat; Guided by Shailendra kumar

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Material type: Text

TextLanguage: English Publication details: Lucknow Integral University 2013Description: 83p; 30cmSubject(s):

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Holdings
Item type	Current library	Collection	Call number	Status	Notes	Date due	Barcode
Dissertation-Master Degree	CENTRAL LIBRARY	ELECTRICAL	621.3 FAH/D (Browse shelf(Opens below))	Not For Loan	Electrical Engineering		DM0765

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Previous	621.3 CHA/P Performance Evaluation for Adaptive Equalization of WiMAX 802.16e OFDMA System in Presence of Fading Channel	621.3 DAN/I Implementation of Improved SPECK Coder using MATLAB	621.3 DAR/N Novel Low-Power,Energy-Efficient Full Adder For Ultra Deep-Sub micron Technology	621.3 FAH/D Design and Implementation of RC6 Block Cipher using VHDL	621.3 FAM/D design of low Power,High Speed Ring VCO	621.3 FAR/A Analysis of SPIHT and Its Low Memory Versions	621.3 FAR/I Implementation of FPAA using Current Conveyor	Next

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