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Clock Period Minimization Through Retiming Technique Imroz Alam; Guided by N.R.Kidwai

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Material type: Text

TextLanguage: English Publication details: Lucknow Integral University 2014Description: 40p; 30cmSubject(s):

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Holdings
Item type	Current library	Collection	Call number	Status	Notes	Date due	Barcode
Dissertation-Master Degree	CENTRAL LIBRARY	ELECTRICAL	621.3 IMR/C (Browse shelf(Opens below))	Not For Loan	Electrical Engineering		DM1043

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Previous	621.3 HAS/S Simulation of high Performance Second Generation CMOS Current Controlled Conveyors(CCCIIs) & Their Application	621.3 HEE/M Modelling abd Simulation of Bridgeless Power Factors Correction Boost Converter	621.3 HUS/D Design of Decimation Filter for Hearing Aid Application	621.3 IMR/C Clock Period Minimization Through Retiming Technique	621.3 IRS/S Solid State Thermoelectricity Generator and its use in Energy Recycling	621.3 JAI/S Speed and Torque Control of a Permanent Magnet Brush less DC Motor	621.3 JYO/D Design and Soft Implementation of N-Bit SRT Divider on FPGA Through VHDL	Next

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