TY  - BOOK
AU  - Saxena, Prashant
AU  - Shelar, Rupesh S.
AU  - Sapatnekar, Sachin S.
TI  - Routing Congestion in VLSI Circuits :estimation and optimization 
SN  - 9788181812857
U1  - 621.395 
PY  - 2010///
CY  - New Delhi
PB  - Springer
KW  - VLSI Circuits
KW  - Electronic Communication
N1  - index included
ER  -