TY  - BOOK
AU  - Singh, Devendra
TI  - Design & Development of Gate Signals For 36Volts 1000HZ Three Phase Inverter
U1  - 621.3 
PY  - 2014///
CY  - Lucknow
PB  - Integral University
KW  - Electrical Engineering
N1  - Include Abstract,CD& References
ER  -