| 000 | 00552nam a22001697a 4500 | ||
|---|---|---|---|
| 008 | 161125b xxu||||| |||| 00| 0 eng d | ||
| 041 | _aEnglish | ||
| 082 |
_a621.3 _bMAT/D |
||
| 100 | _aMathur, Prashant | ||
| 245 |
_aDesign of Error-Tolerant CMOS Adder using Optimized Nano Technology _cPrashant Mathur; Guided by Shailendra Kumar |
||
| 260 |
_aLucknow _bIntegral University _c2015 |
||
| 300 | _a52p; 30cm | ||
| 500 | _aInclude Abstract,CD & References | ||
| 650 | _2Electrical Engineering | ||
| 658 | _2Electrical Engineering | ||
| 942 |
_2ddc _cDM |
||
| 999 |
_c23144 _d23144 |
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