000 00579nam a2200169Ia 4500
020 _a9789812531316
_c0.00
082 _a621.392
_bPAD/D
100 _aPadmanabhan, T R
245 _aDesign Through Verilog HDL
_cT R Padmanabhan
_h[Text]
260 _aNew York
_bJohn Wiley
_c2004
300 _axii, 455p.; 23Cm.
500 _aIncludes Appendixes and Index
650 _aComputer Language.
700 _aTripura Sundari, B Bala
658 _aEE, EC
041 _aEnglish891
_aIntroduction to VLSI Design891
_aIntroduction to Verilog891
_aLanguage Constructs891
_aModeling
999 _c4431
_d4431